1. Technical Field
The invention relates generally to integrated circuit (IC) chip fabrication, and more particularly, to a method of adjusting buried resistor resistance.
2. Background Art
In the integrated circuit (IC) chip fabrication industry, circuits often times require buried resistors. One type of buried resistor is an OP resistor, which is formed by implanting in polyconductor or active regions of an IC chip. OP resistors are inexpensive to generate because they use implants and process parameters already required for other devices. Since control of the generation of the other devices is critical for overall operation of the circuit, the control of the OP resistor may suffer. In particular, as manufacturing processing proceeds, adjustments are often times made between wafers and/or lots to control the properties of, for example, field effect transistors (FETs). During these adjustments, OP resistance is typically a secondary concern. As a result, as adjustments are made to control the structure as the prime devices dictate, OP resistance tends to drift. Consequently, matching of the resistance to design values is problematic. One approach to address this situation is having a dedicated implant for the OP resistor. However, this approach imposes increased expense and complexity.